A foreword

The design of this frequency counter regards AT89C51 one-chip computer as the core, utilize timing / counter within him to finish the measurement in video interval / frequency to be measured. Have 2 16 timing / counter within the one-chip computer AT89C51, the work of timing / counter can be achieved by programming timing, counted and produced and counted the function stopped requiring while overflowing. Under the operating mode of the timer, in examining in the time interval, come for one machine cycle each time, counter auto-increment while using 12 MHz clock, every 1 s adds by 1 ,Can be used for measuring the time interval on a basis of machine cycle like this. Under the intersection of counter and operating mode, add the counter is added by 1 when examining signals and happening from the jump transfer of 1 to 0 to external pin, frequency that can be used for measuring the signal to be measured under counting the control of the gate like this. External input is sampled once in each machine cycle, measure once like this it takes 2 machine cycles 24 oscillating periods from the jump transfer of 1 to 0 at least ,So maximum counts the speed for 1/ 24 of the clock rate while using 12 MHz clock, it is 500 kHz that maximum counts the speed . The work of timing / counter is run the control bit TR is controlled, as TR puts 1, timing / counter begins to count; Clear 0 in TR, stop counting.

This design synthesis has considered the survey accuracy of the frequency and measured the requirement of response time. For example it is 3 significant digits to look on the measuring result of the frequency as, require, at this moment if the frequency of the signal to be measured is 1 Hz, it must be greater than 1 000 s to count the gate width. In order to give consideration to the survey accuracy of the frequency and requirement for measuring response time, divide measuring the work into two kinds of methods:

1 When at the time of frequency of the signal to be measured> 100 Hz, fix /counter constitute counter,on a basis of machine cycle, produce, count gate from software, width count gate>, at the 1 s, satisfiable the intersection of frequency and for 3 significant digit measuring result;

2 As the frequency <100 Hz of the signal to be measured, timing / counter constitutes the timer, by turning the signal to be measured into a rectangular wave for the processing circuitry of frequency counter, the rectangular wave width equals the cycle of the signal to be measured. Make and count the gate with the rectangular wave at this moment, act as the frequency of the signal to be measured =100 Hz, the minimum counter value while using 12 MHz clock is 10 000, totally meet the requirement for survey accuracy.

Quantum auto-switch of 2 frequency counters

Use counting method realize frequency measurement, external when examining signals to make as the one-chip computer / counter count the source, make use of software time delay procedure to realize and count the gate. The working phase of the frequency counter is: Counter register clear 0 of timing / counter, put 1, start timing / counter to work in control bit TR of running; Run the intersection of software and the intersection of time delay and procedure, time / go on counting to the external signal to be measured by counter at the same time, clear 0 of TR, stop counting while delaying time to finish. Read out the measured data from the counter register, the measured data is after finishing data processing, revealed the measuring result by the display circuit.

While using the regular method to realize frequency measurement, it means the periodic rectangular wave of signal to be measured that the pre- processing circuitry of the external frequency counter of signal passing to be measured turns into width, this rectangular wave adds to the input foot of timing / counter too. Whether the high level of job is added to the input foot of timing / counter; When judging the high level is added to fix / input foot of counter, control bit of running TR put 1, start timing / counter to the periodic count of machine of the one-chip computer, find whether the rectangular wave high level is over at the same time; TR is clear 0 when judging the high level finishes, stops counting, then read out the measured data from the counter register. The cycle that the data read out at this moment reflect the signal to be measured, vary periodic quantity into a frequency value through data processing, revealed the measuring result by the display circuit.

Measure the consequential display format and adopt the scientific counting method, the significant digit is multiplied by 10 is the power of the bottom. The frequency counter designed herein reveals the measuring result with 5 nixie tubes: The first 3, in order to measure the consequential significant digit; The 4th is symbols of a unit of indexes; The 5th is exponential values. Have not only guarantee to measure the consequential display precision but also guaranteed to measure the consequential display range 0 with this kind of display format. 100 Hz- 9. 99 MHz .

Frequency counter measure the intersection of quantum and course of automatic change-over measure frequency counter high side of quantum, begin. Because only reveal 3 significant digits, the high side of measuring the quantum counts the gate and does not need to be too wide, for example entering the signal frequency domain of the counter in 10. 0- 99. 9 kHz, it is 10 ms to count the gate width. Frequency counter use counting method realize frequency measurement when the break in, make, count gate width narrowest, finish measurement, judge whether the measuring result has 3 significant digits, if establish, reveal, finish the measurement work; Otherwise count the gate width to expand by 10 times, continue judging measurement, reach 1 s until counting the gate width, the frequency domain of signal to be measured of the correspondent entry one-chip computer is 100- 999 Hz at this moment. If the measuring result does not have 3 significant digits yet, the frequency counter uses the regular method to realize frequency measurement.

It is the cycle of the signal to be measured that the regular method is metric, this kind of method only has a kind of quantum, the measuring result converts video interval to the correspondent frequency value through the arithmetic module of the floating number, reveal again. No matter which kind of way to adopt, so long as finish measurement, the frequency counter is automatic at the beginning the next measurement is circulated, so this frequency counter has metric function continuously, realize the automatic change-over of the quantum at the same time.

Pre- processing circuitry of 3 signals

The pre- processing circuitry of the signal is shown as in Fig. 1, he is formed by circuit of 4 grades. The 1st zero biased amplifier, as input signal being or at the negative voltage for zero, the triode ends, export the high level; When the input signal is the positive voltage, the triode is turned on, the output voltage drops with rising of the input voltage. A biased amplifier replaces being plus-minus the deformation of wave to change into a unidirectional pulse, this makes frequency counter measure the frequency of the pulse signal, can measure the frequency of the sine wave signal too. The enlarged ability of the amplifier has realized the measurement of the dwarf signal, this circuit can measure the range and is greater than or equal to 0. Sine wave of 5 V or signal to be measured of the pulse wave. The triode should adopt the switch triode in order to guarantee the amplifier has good high frequency response. The 2nd adopts the inverter 7414 with Schmitt trigger, he is used for varying the unidirectional pulse that the amplifier produces into a compatible rectangular wave with TTL/ CMOS level. The 3rd adopts the decimal system synchronous counter 74160, CLK that the 2nd rectangular wave exported added to 74160, can realize to output 10 frequency demultiplication grade of a plurality of 74160 can further expand frequency measurement in the range to connect from TC of 74160 with to act as . The 4th adopts the decimal system synchronous counter 74160 too, CLK that the 3rd rectangular wave exported added to him, can realize 2 frequency demultiplication, for symmetrical rectangular wave output its as export from Q0 of him, the rectangular wave width is equal to the cycle of the signal to be measured, thus video interval offers the foundation in order to measure.

4 systematic software design

The break in of frequency counter or finishing frequency measurement, the system software measures initialisation. Measure the initialized module and set up and pile the stack pointer SP , working register, interruption control and timing / counter operating mode. The work of timing / counter is set up as the counter way at first, namely is used for measuring the signal frequency. Time at first / 0 clear in counter register of counter, run the intersection of control bit and TR put 1, start, treat count to examine the signal. Count gate, realize by the intersection of time delay and procedure by software, from minimum high quantum of measuring frequency to count the gate Begin measurement, it counts gates to be TR 0 clear finish, stop, count. The number value in the counter register is changed from the hexadecimal number into the decimal number through the converse routine of the numbering system. Judge this most significant position counted, if this is not 0, meet the requirement of significiant figure of the measured data, send the display module with quantum information in measured value; If this is 0, expand the width of counting the gate by 10 times, treat the count of examining the signal again, until meeting the requirement of significiant figure of the measured data.

A foreword

The design of this frequency counter regards AT89C51 one-chip computer as the core, utilize timing / counter within him to finish the measurement in video interval / frequency to be measured. Have 2 16 timing / counter within the one-chip computer AT89C51, the work of timing / counter can be achieved by programming timing, counted and produced and counted the function stopped requiring while overflowing. Under the operating mode of the timer, come for one machine cycle each time in examining in the time interval, counter auto-increment while using 12 MHz clock, every 1 s adds by 1 ,Can be used for measuring the time interval on a basis of machine cycle like this. Under the intersection of counter and operating mode, add the counter is added by 1 when examining signals and happening from the jump transfer of 1 to 0 to external pin, frequency that can be used for measuring the signal to be measured under counting the control of the gate like this. External input is sampled once in each machine cycle, measure once like this it takes 2 machine cycles 24 oscillating periods from the jump transfer of 1 to 0 at least ,So maximum counts the speed for 1/ 24 of the clock rate while using 12 MHz clock, it is 500 kHz that maximum counts the speed . The work of timing / counter is run the control bit TR is controlled, as TR puts 1, timing / counter begins to count; Clear 0 in TR, stop counting.

This design synthesis has considered the survey accuracy of the frequency and measured the requirement of response time. For example it is 3 significant digits to look on the measuring result of the frequency as, require, at this moment if the frequency of the signal to be measured is 1 Hz, it must be greater than 1 000 s to count the gate width. In order to give consideration to the survey accuracy of the frequency and requirement for measuring response time, divide measuring the work into two kinds of methods:

1 When at the time of frequency of the signal to be measured> 100 Hz, fix /counter constitute counter,on a basis of machine cycle, produce, count gate from software, width count gate>, at the 1 s, satisfiable the intersection of frequency and for 3 significant digit measuring result;

2 As the frequency <100 Hz of the signal to be measured, timing / counter constitutes the timer, by turning the signal to be measured into a rectangular wave for the processing circuitry of frequency counter, the rectangular wave width equals the cycle of the signal to be measured. Make and count the gate with the rectangular wave at this moment, act as the frequency of the signal to be measured =100 Hz, the minimum counter value while using 12 MHz clock is 10 000, totally meet the requirement for survey accuracy.

Quantum auto-switch of 2 frequency counters

Use counting method realize frequency measurement, external when examining signals to make as the one-chip computer / counter count the source, make use of software time delay procedure to realize and count the gate. The working phase of the frequency counter is: Counter register clear 0 of timing / counter, put 1, start timing / counter to work in control bit TR of running; Run the intersection of software and the intersection of time delay and procedure, time / go on counting to the external signal to be measured by counter at the same time, clear 0 of TR, stop counting while delaying time to finish. Read out the measured data from the counter register, the measured data is after finishing data processing, revealed the measuring result by the display circuit.

While using the regular method to realize frequency measurement, it means the periodic rectangular wave of signal to be measured that the pre- processing circuitry of the external frequency counter of signal passing to be measured turns into width, this rectangular wave adds to the input foot of timing / counter too. Whether the high level of job is added to the input foot of timing / counter; When judging the high level is added to fix / input foot of counter, control bit of running TR put 1, start timing / counter to the periodic count of machine of the one-chip computer, find whether the rectangular wave high level is over at the same time; TR is clear 0 when judging the high level finishes, stops counting, then read out the measured data from the counter register. The cycle that the data read out at this moment reflect the signal to be measured, vary periodic quantity into a frequency value through data processing, revealed the measuring result by the display circuit.

Measure the consequential display format and adopt the scientific counting method, the significant digit is multiplied by 10 is the power of the bottom. The frequency counter designed herein reveals the measuring result with 5 nixie tubes: The first 3, in order to measure the consequential significant digit; The 4th is symbols of a unit of indexes; The 5th is exponential values. Adopt this kind of display format to already guarantee to measure the consequential display precision, guarantee, measure consequential display range also ‘ 0. 100 Hz- 9. 99 MHz .

Frequency counter measure the intersection of quantum and course of automatic change-over measure frequency counter high side of quantum, begin. Because only reveal 3 significant digits, the high side of measuring the quantum counts the gate and does not need to be too wide, for example entering the signal frequency domain of the counter in 10. 0- 99. 9 kHz, it is 10 ms to count the gate width. Frequency counter use counting method realize frequency measurement when the break in, make, count gate width narrowest, finish measurement, judge whether the measuring result has 3 significant digits, if establish, reveal, finish the measurement work; Otherwise count the gate width to expand by 10 times, continue judging measurement, reach 1 s until counting the gate width, the frequency domain of signal to be measured of the correspondent entry one-chip computer is 100- 999 Hz at this moment. If the measuring result does not have 3 significant digits yet, the frequency counter uses the regular method to realize frequency measurement.

It is the cycle of the signal to be measured that the regular method is metric, this kind of method only has a kind of quantum, the measuring result converts video interval to the correspondent frequency value through the arithmetic module of the floating number, reveal again. No matter which kind of way to adopt, so long as finish measurement, the frequency counter is automatic at the beginning the next measurement is circulated, so this frequency counter has metric function continuously, realize the automatic change-over of the quantum at the same time.

Pre- processing circuitry of 3 signals

The pre- processing circuitry of the signal is shown as in Fig. 1, he is formed by circuit of 4 grades. The 1st zero biased amplifier, as input signal being or at the negative voltage for zero, the triode ends, export the high level; When the input signal is the positive voltage, the triode is turned on, the output voltage drops with rising of the input voltage. A biased amplifier replaces being plus-minus the deformation of wave to change into a unidirectional pulse, this makes frequency counter measure the frequency of the pulse signal, can measure the frequency of the sine wave signal too. The enlarged ability of the amplifier has realized the measurement of the dwarf signal, this circuit can measure the range and is greater than or equal to 0. Sine wave of 5 V or signal to be measured of the pulse wave. The triode should adopt the switch triode in order to guarantee the amplifier has good high frequency response. The 2nd adopts the inverter 7414 with Schmitt trigger, he is used for varying the unidirectional pulse that the amplifier produces into a compatible rectangular wave with TTL/ CMOS level. The 3rd adopts the decimal system synchronous counter 74160, CLK that the 2nd rectangular wave exported added to 74160, can realize to output 10 frequency demultiplication grade of a plurality of 74160 can further expand frequency measurement in the range to connect from TC of 74160 with to act as . The 4th adopts the decimal system synchronous counter 74160 too, CLK that the 3rd rectangular wave exported added to him, can realize 2 frequency demultiplication, for symmetrical rectangular wave output its as export from Q0 of him, the rectangular wave width is equal to the cycle of the signal to be measured, thus video interval offers the foundation in order to measure.

4 systematic software design

The break in of frequency counter or finishing frequency measurement, the system software measures initialisation. Measure the initialized module and set up and pile the stack pointer SP , working register, interruption control and timing / counter operating mode. The work of timing / counter is set up as the counter way at first, namely is used for measuring the signal frequency. Time at first / 0 clear in counter register of counter, run the intersection of control bit and TR put 1, start, treat count to examine the signal. Count gate, realize by the intersection of time delay and procedure by software, from minimum high quantum of measuring frequency to count the gate Begin measurement, it counts gates to be TR 0 clear finish, stop, count. The number value in the counter register is changed from the hexadecimal number into the decimal number through the converse routine of the numbering system. Judge this most significant position counted, if this is not 0, meet the requirement of significiant figure of the measured data, send the display module with quantum information in measured value; If this is 0, expand the width of counting the gate by 10 times, treat the count of examining the signal again, until meeting the requirement of significiant figure of the measured data.

As measure deterministic process until count the intersection of gate and width reach 1 s correspondent frequency 100- 999 Hz in measurement limit while being above-mentioned When 3 by significant digit yet measuring result,use methods regular not to last cycles at signal to be measured frequency counter. Timing / work of counter set up the intersection of timer and way, timing as / 0 clear in counter register of counter, judge at to be measured signal jumping along after the arrival, run the control bit TR is being put as 1, count by duty cycle of one-chip computer, until the leaving of the signal jumps along coming, the control bit TR of running is clear 0, stop counting. 16 highest counter value of timing / counter are 65 535, when the frequency of the signal to be measured is lower, timing / counter will overflow. When producing and overflowing, the procedure enters the timer interrupt service routine, counts in overflowing the number of times. The cycle of the signal to be measured is made up of 3 bytes: Timing / counter overflowed number of times, timing / counter 8 and low 8 high. The relation between the frequency f and cycle T of the signal of the signal is: f =1/ T

After finishing the periodic measurement of the signal, need doing once reciprocally and making operation and winning the frequency of the signal. In order to improve the operational precision, adopt the arithmetic operation of the floating number. The floating number is made up of 3 bytes: The first byte most significant position is a numeral sign, other 7 are characteristic; 2 bytes a high byte of the mantissa; 3 bytes a low byte of the mantissa. The periodic 3 bytes fixed point number of signal to be measured, through intercepting 16, characteristic floating number that change into the aforesaid form of setting up the numeral sign and calculating high. Then the arithmetic operation of the floating number obtained the signal frequency value expressed with the form of the floating number to its process. And then through from floating number to the intersection of BCD and vary the intersection of cost and display format of frequency counter with the intersection of floating number and signal frequency value that form express yards of conversion module, send the frequency value that the display module reveals the signal to be measured. After finishing revealing, the frequency counters all begin the frequency measurement of the signal next time. The systematic software flow pattern is shown as in Fig. 2.

Systematic software design adopts the modularization design method. The overall system is made up of various function module such as initialized module, display module and signal frequency frequency measurement module. After power up, enter module of system initiation, the system software is brought into operation. In the course of carrying out, transfer each function module and finish frequency measurement, quantum auto-switch, periodic measurement and measuring result to reveal respectively according to the procedure of running.

5 surveys result and error analysis

In order to weigh working condition and survey accuracy of the frequency counter designed this time, we have carried on the test to the system. Regard Model E312B universal counter which the instrument plant of the telecom of Nanjing made as the basic reference, measure signal source with the frequency counter designed this time, the measured data is shown in Table 1.

The pre- processing circuitry of one signal showed such as pursuing, the signal to be measured passed frequency demultiplication 10* 2 times before entering the one-chip computer. The frequency counter, in order to the signal frequency when enter the one-chip computer =100 Hz is a basic reference ‘ The signal frequency to be measured is 2 kHz ,Greater than this frequency and adopt frequency measurement, is smaller than this frequency and adopt periodic measurement. Can be found out by the frequency measurement contrast table of Table 1, the metric survey accuracy of the frequency is greater than cycle metric survey accuracy.

Adopt the counting method to realize frequency measurement, the source of errors mainly has 2 parts of counting error and gate error. The error expression is:

Among them: N is the counter value, t is gate time.

The relative divergence dt/ t of gate time mainly depends on the frequency stability of Jingzhen of one-chip computer, it choose it is appropriate quartz crystal and resonator, error generally but 2 kHz comes from the counting error. Increase the influence of this reducible error of -figure number of the expicity significant digit.

When examining the signal frequency <2 kHz, it is the cycle of the signal to be metric directly. The cycle metric error expression is:

Among them: DN/ N is a quantization error, d 0 / 0 is the frequency stability of Jingzhen of one-chip computer.

Signal frequency <100 Hz, the minimum counter value while using 12 MHz clock is 10 000 of entering the one-chip computer while carrying on periodic measurement. When only revealing 3 significant digits, this error can be neglected too now. The cycle measured value of the signal to be measured is varied into a frequency value through the operation of floating number, the error at this moment comes from operation and numbering system of the floating number and changes errors brought.

6 concludes the speech

Have introduced a design method based on frequency counter which the one-chip computer 89C51 makes, frequency counters produced need less peripheral devices, are suitable for use in the embedded system. This frequency counter employs periodic measurement and corresponding mathematics to deal with and realize the frequency measurement of the low frequency band, so is very apt to expand periodic measurement and duty ratio measurement of realizing the signal. Person applied to the pen designed this frequency counter ” The high-frequency experimental provision ” Among them, used for measuring the frequency stability of LC Shaker and resistance-capacitance oscillator outcoming signal, make the good application effect. Bibliographical reference

[1]Zhou HangCi. The one-chip computer employs programming technique [M ]. Beijing: Beihang University publishing house, 1991.

[2]Li Hua,etc.. Practical interfacing [M ] of the MCS-51 series one-chip computer. Beijing: Beihang University publishing house, 1993